List and briefly define two approaches to dealing with multiple interrupts

List and briefly define two approaches to dealing with multiple interrupts

Two approaches can be taken to dealing with multiple interrupts. 

First Approach to dealing with multiple interrupts:

The first is to disable interrupts while an interrupt is being processed. A disabled interrupt simply means that the processor can and will ignore that interrupt request signal. If an interrupt occurs during this time, it generally remains pending and will be checked by the processor after the processor has enabled interrupts.Thus, when a user program is executing and an interrupt occurs, interrupts are disabled immediately. After the interrupt handler routine completes, interrupts are enabled before resuming the user program, and the processor checks to see if additional interrupts have occurred.This approach is nice and simple, as interrupts are handled in strict sequential order.

List and briefly define two approaches to dealing with multiple interrupts

Second Approach to dealing with multiple interrupts:

A second approach is to define priorities for interrupts and to allow an interrupt of higher priority to cause a lower-priority interrupt handler to be itself interrupted . As an example of this second approach, consider a system with three I/O devices: a printer, a disk, and a communications line, with increasing priorities of 2, 4, and 5, respectively. Based on an example in [TANE97], illustrates a possible sequence. A user program begins at t 0. At t 10, a printer interrupt occurs; user information is placed on the system stack and execution continues at the printer interrupt service routine (ISR).While this routine is still executing, at t 15, a communications interrupt occurs. Because the communications line has higher priority than the printer, the interrupt is honored. The printer ISR is interrupted, its state is pushed onto the stack, and execution continues at the communications ISR. While this routine is executing, a disk interrupt occurs (t 20). Because this interrupt is of lower priority, it is simply held, and the communications ISR runs to completion.

List and briefly define two approaches to dealing with multiple interrupts

When the communications ISR is complete (t 25), the previous processor state is restored, which is the execution of the printer ISR. However, before even a single instruction in that routine can be executed, the processor honors the higherpriority disk interrupt and control transfers to the disk ISR. Only when that routine is complete (t 35) is the printer ISR resumed.When that routine completes (t 40), control finally returns to the user program.


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List and briefly define two approaches to dealing with multiple interrupts